MindTree’s approach to WLAN MAC design provides maximum flexibility to chip vendors without compromising performance parameters such as processor load and memory requirements. Compliant with both IEEE 802.11 a and b specifications, the WLAN MAC core is available as silicon proven synthesizable Verilog core with protocol software. The IP can be reconfigured to work with any 8/16/32 bit microcontroller on which protocols reside and be reconfigured to interface with both a and b WLAN Baseband implementations.

Customers can quickly develop IEEE compliant 802.11 MAC chips or integrate the MAC functionality into SOC designs. The MAC architecture is flexible enough to support various on-chip FIFOs and sizes to enable optimal custom application designs. With minimum processor load and chip power consumption, fabless companies can easily customize MAC IP to develop the lowest foot print SOC design for both access point and station applications.